From the icfb window, bring up Library Manager from the Tools menu (select Tools/Library Manager; automatically starts after starting icfb)
On the very top of the window the title bar should say ' Virtuoso Layout Editing: ee141_lab2 nand2 layout '.
LSW window is the Smart Palette. The Smart Palette provides many features.
Before we go any further, here is how to get help if you ever need it.
OK, let's get started on some layout.
Two nfet's merged (stacked) together should appear.
There are several methods for zooming found in the View menu.
The hotkey shift-z can be used to zoom out by a factor of two.
Once you have selected an object or paint you can do lots of things with it.
You can also select objects or paint by clicking on them.
TIP! All of the zoom, move, cut and paste, rotate, etc. features that we just executed using hot keys also have menu equivalents which can be found in the Edit menu.
We are now going to 'paint' a piece of poly to connect the pfet and left nfet gates together.
Using r and p hotkeys to draw rectangles and paths, wire up the two left contact regions and add the connection to the right pfet contacts. If you have trouble with the p command see the next section for some hints. Consult CDK manuals if needed. Your layout should look like this (practical advice: run DRC check periodically to make sure you're making progress in good direction):
Let's say we were laying out this NAND gate for a standard cell library. Furthermore, assume that the power and ground rails are run in metal 1 (M1) and that they are 2.04um wide (2.0um won't work because of the grid granularity, which is 0.06um.).
Once you have drawn the top power line you can simply copy it and move it down.
Notice that the inputs and outputs are all found within the power straps. What if they need to be brought out so a router can get to them?
There is one last thing before we are finished with our NAND gate.
We are getting ready to finish this cell. You should add substrate and well contacts (Hint: use ptap and ntap p-cells). You can try to make the cell as compact as possible, so it can be tightly abutted.
Now let's use our NAND gate and an inverter (which you need to create. Hint: simply copy and modify the NAND.) cell to build something a little bigger.
You may now want to see what's inside of the NAND2 cells and the inverter.
OK, now that we are here, let's say our boss comes over and says 'sorry but you need to double the number of substrate/well contacts'.
To learn more about Virtuoso and other tools just type cdsdoc at your Unix prompt, and the documentation browser should appear.